Aims & Objectives
In the SYCLops project, the synergy of open standards at the hardware and software level is explored: Combining RISC-V hardware and the open SYCL programming model opens the door for an innovative codesigned platform from hardware, the platform layer including compilers and tools all the way to the application layer. This in turn can provide the foundations of a future-proof ecosystem for AI and HPC.
Role of the EMCL
In this project, the EMCL will develop cutting-edge runtime and compiler technologies using its own SYCL implementation. This includes scheduling techniques, optimizations and generalizations of existing compilation flows to target the new software and hardware stack.
We gratefully acknowledge funding from the European Union's Horizon research and innovation programme under grant agreement No 101092877.
People from the EMCL
See the project website.